Application-specific integrated circuits (ASICs) fabricated using complementary metal–oxide–semiconductor (CMOS) technology are attractive for making control electronics for certain types of quantum computing platform, provided they can be made to operate at cryogenic temperatures. However, reducing the power consumption of ASICs for qubit readout and control remains a major challenge. Hanjun Jiang and colleagues now report an interface chipset for superconducting transmon qubit control and readout that is made using 28-nm node CMOS technology, operates at 3.5 K and has very low power consumption.
The researchers — who are based at Tsinghua University, Nanyang Technological University and the Beijing Academy of Quantum Information Sciences — created the chipset using one ASIC for readout and one ASIC for control. In the readout ASIC, the team developed a phase-detection-based receiver, which measures the phase difference between a stimulating signal and a signal reflected from the qubit’s resonator, and therefore shifted by an amount dependent on the qubit state. The power consumption of the readout ASIC to detect the state of two qubits was 11 mW (about three times lower than previous readout ASICs), and for the controller ASIC it was 4.3 mW per qubit.
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